Silicon dioxide (SiO 2 ) coatings provide a dielectric or passivation layer when applied to silicon (Si), glass and other wafer types used in semiconductor, MEMS, BioMEMS, energy storage devices and other applications.
Properly specifying the wafer type, its characteristics, and the oxide coating applied is critical to the expected functioning of manufacturing equipment.
Semiconductor wafers are primarily manufactured from one of the following materials:
silicon
Glass and Fused Silica
III-V or II-VI compound semiconductors
Sapphire and Silicon Carbide (SiC)
All of the above material types are available with silicon dioxide (SiO 2 ) or silicon oxynitride (SiO x N y ) insulator coatings. They can be oxide-coated on one or both sides, and can be coated on the polished side, as on the etch-finish side of single-sided polished wafers.
If you plan to etch down to one layer or a device fabricated on the front side, the backside coating can be used as a masking layer; both wet and dry etch processes can achieve very good selectivity.
Any wafer with a diameter of 50 to 300 mm can be oxide-coated with SiO2 or SiOxNy and can be run in small or large batches, or in single-wafer scale reactors, depending on Deposition growth rate and number of wafers required.
The process and some applications for each insulator material are listed below.
Atmospheric thermal oxides – ATOx:
This coating is one of the oldest semiconductor processes, dating back to the 1950s, when the oxidation of silicon was first required to produce insulating layers in MOS devices.
Wafers are typically loaded in groups of 25 into quartz boats, which hold the wafers vertically with some space between them. The boats are then processed using a tube furnace, heating them slowly (to prevent thermal stress on the silicon) to around 1020 o C, which is a commonly used oxidation temperature.
It is then held at that temperature for the time required to grow the desired thickness of oxide, then slowly cooled to idle or room temperature and the ship unloaded. This method of supporting the wafers during growth requires that they are almost always oxidized on both sides, and the oxide needs to be removed by protecting the front side with resist and stripping the backside oxide using buffered HF (BHF) until the surface becomes flush When hydrophobic again.
Si has a strong affinity for O2, and oxygen is easily adsorbed onto the Si surface and transported across the oxide to the Si interface, where additional SiO2 grows. Increasing or decreasing the growth temperature can significantly increase or decrease the growth rate. In 1965, BE Deal and AS Grove, two scientists at Fairchild Semiconductor, modeled the growth of this family of oxides, known as the "Deal-Grove model," and are used today to predict growth rates.
Oxide grown in this way is stoichiometric and has a reliable refractive index (1.46 at 632nm). The color of the film is also very reliable and can be easily viewed under white light and compared to standard, widely used color charts.
There are two commonly used thermal oxidation processes; dry oxide and wet oxide.
Dry oxides are used when the required oxide thickness is small, as the process is slow and <100> Si growth rates are typically 80 to 100nm.hr-1 at 1020 o C. Increasing or decreasing the growth temperature will increase or decrease the growth rate significantly. As the name implies, the dry oxidation process uses a dry source of molecular oxygen, such as a compressed gas cylinder. The oxygen tank is not contaminated by water and the resulting oxidation process produces a less porous SiO2 film.
The wet oxidation process uses steam as a precursor and is obtained by bubbling O2 feed gas through a heated deionized water flask until it is saturated. Adding H 2 O to the process increases the growth rate of <100> Si to 290-310nm.hr-1 at 1020 o C.
Hydrochloric acid (HCl) can be used to remove native oxide from Si prior to oxide growth, which reduces the density of states at the oxide/Si interface and improves its performance as a dielectric. The presence of HCl also increases the growth rate of the oxide layer.
The presence of H in the wet process increases the transport rate across the oxide to the interface. The resulting oxide grew to 46% on top of the silicon surface and 54% on top of the original silicon surface, both to the silicon and on top. In other words, the overall wafer thickness does not increase with the depth of the oxide layer because some silicon is consumed during the oxidation process.
Another factor affecting the growth rate is Si crystal orientation, and the growth rate of <111> Si is about 1.7 times that of <100> Si. This is because there are more Si atoms available on the <111> plane, thus reacting faster with O2. Highly doped silicon (about 10E19 to 10E20.cm-3) also oxidizes faster than less doped silicon.
Due to the difference in thermal expansion between Si and SiO2, thermally grown oxides usually have compressive stress at the surface, with a typical value of about 300 MPa.
Plasma Enhanced Chemical Vapor Deposition, PECVD SiO2:
This is another common oxide wafer growth technique that was developed as a way to grow high-quality oxide-coated interlayer dielectric materials at relatively low temperatures, compatible with metallization schemes.
The silane precursor (SiH 4 ) and N 2 O were mixed, then fed into a vacuum chamber and excited using a 13.56MHz RF source. The electrode on which the wafer is placed is kept at 350 to 400 o C, and the oxide forms SiO2 by a thermocatalytic reaction in the excited gas state. A liquid precursor, tetraethyl orthosilicate Si(C 2 H 5 O) 4 (TEOS), may also be used. This avoids the use of silane/dichlorosilane and also reduces stress levels in the SiO2 film.
The stress can be controlled by adjusting the SiH 4 :O 2 ratio of the raw gas, and the compression pressure ranges from 50 to 300 MPa, which is comparable to the stress generated by the thermal oxidation process.
The growth rate is less dependent on orientation and doping levels, and the film composition can be tuned to be stretched or compressed. The growth rate is typically in the range of 300 to 400nm.min-1, so it is faster than high temperature thermal techniques.
The main advantage of this technology is the lower growth temperature, between 350 and 400 o C, which is compatible with aluminum when used for interlayer dielectrics and passivation. The main disadvantage (or advantage, depending on the number of wafers required) is that most of these reactors are cylindrical chambers with flat electrodes, so the number of wafers that can be processed simultaneously is much lower than that of tube furnaces.
application
Thermal oxides have many applications including use as insulators, implant or etch masks and etch stop layers in SOI wafers, and as part of passivation layer stacks. However, ATOx has some limitations due to the higher growth temperature, so in the passivation layer, the underlying metal layer needs to be a refractory metal to withstand the growth temperature.
The optical properties make thermal oxides ideal for use in photonic devices and also as coatings on silicon wafers, providing excellent contrast to flakes of 2D material exfoliated onto them and providing underlying insulation for mobility measurements. An example can be seen below, where single-layer and few-layer graphene flakes, only a few micrometers across, are clearly visible.
A typical example of PECVD grown oxides is in very high integrity passivation layers, where the ability to add NH3 in the process enables the production of SiOxNy silicon oxynitride in a single process step, resulting in excellent passivation layer instead of a growth sandwich of SiO 2 and Si 3 N 4 .
